Differences
This shows you the differences between two versions of the page.
Both sides previous revision Previous revision Next revision | Previous revision | ||
en:netzer:pins [2011/12/19 12:23] 127.0.0.1 external edit |
en:netzer:pins [2014/02/09 14:32] (current) |
||
---|---|---|---|
Line 3: | Line 3: | ||
{{ :netzer_top.png?nolink& |}} | {{ :netzer_top.png?nolink& |}} | ||
- | ===== Overview ===== | ||
- | **Pins of pin header JP1**\\ | + | ===== Pins of pin header JP1 ===== |
^ Name ^ Description ^ | ^ Name ^ Description ^ | ||
- | | INT | GPIO pins, see [[en:netzer:io|IO]] for more information. | | + | | INT | [[pins#overview-over-all-gpio-signals|GPIO pins]] | |
| CLK | ::: | | | CLK | ::: | | ||
| MI | ::: | | | MI | ::: | | ||
Line 15: | Line 15: | ||
| IO5 | ::: | | | IO5 | ::: | | ||
| IO3 | ::: | | | IO3 | ::: | | ||
- | | VA2 | Connection for [[en:netzer:pins#Power-over-Ethernet (PoE)|Power-over-Ethernet]]. That is the center tap of the Ethernet coil between RJ45 pins 3 and 6. | | + | | VA2 | Connection for [[pins#Power-over-Ethernet (PoE)|Power-over-Ethernet]]. That is the center tap of the Ethernet coil between RJ45 pins 3 and 6. | |
- | | VB2 | Connection for [[en:netzer:pins#Power-over-Ethernet (PoE)|Power-over-Ethernet]]. This pin is directly connected to the network jack of Netzer (RJ45 pins 7 and 8). | | + | | VB2 | Connection for [[pins#Power-over-Ethernet (PoE)|Power-over-Ethernet]]. This pin is directly connected to the network jack of Netzer (RJ45 pins 7 and 8). | |
+ | |||
+ | |||
+ | ===== Pins of pin header JP2 ===== | ||
- | **Pins of pin header JP2**\\ | ||
^ Name ^ Description ^ | ^ Name ^ Description ^ | ||
| RST | Use this pin to reset Netzer. The signal is low active (this means 0 resets Netzer). The Reset signal can also be used for waking up Netzer from sleep mode (after shut down). The pin is optional and can be left open.| | | RST | Use this pin to reset Netzer. The signal is low active (this means 0 resets Netzer). The Reset signal can also be used for waking up Netzer from sleep mode (after shut down). The pin is optional and can be left open.| | ||
| 3V3 | Pin for power supply. Minimum voltage is 3.1\ V. Maximum voltage is 3.6\ V.| | | 3V3 | Pin for power supply. Minimum voltage is 3.1\ V. Maximum voltage is 3.6\ V.| | ||
| GND | Ground potential.| | | GND | Ground potential.| | ||
- | | IO0 | GPIO pins, see [[en:netzer:io|IO]] for more information. | | + | | IO0 | [[pins#overview-over-all-gpio-signals|GPIO pins]] | |
| IO1 | ::: | | | IO1 | ::: | | ||
| IO2 | ::: | | | IO2 | ::: | | ||
| TX | ::: | | | TX | ::: | | ||
| RX | ::: | | | RX | ::: | | ||
- | | VA1 | Connection for [[en:netzer:pins#Power-over-Ethernet (PoE)|Power-over-Ethernet]]. That is the center tap of the ethernet coil between RJ45 pins 1 and 2. | | + | | VA1 | Connection for [[pins#Power-over-Ethernet (PoE)|Power-over-Ethernet]]. That is the center tap of the ethernet coil between RJ45 pins 1 and 2. | |
- | | VB1 | Connection for [[en:netzer:pins#Power-over-Ethernet (PoE)|Power-over-Ethernet]]. This pin is directly connected to the network jack of Netzer (RJ45 pins 4 and 5). | | + | | VB1 | Connection for [[pins#Power-over-Ethernet (PoE)|Power-over-Ethernet]]. This pin is directly connected to the network jack of Netzer (RJ45 pins 4 and 5). | |
Line 37: | Line 39: | ||
{{ :poe.gif?nolink& |PoE example circuit}} | {{ :poe.gif?nolink& |PoE example circuit}} | ||
+ | |||
The image shows an example circuit. Here the PoE supply AG9033 of Silver Telecom is used. | The image shows an example circuit. Here the PoE supply AG9033 of Silver Telecom is used. | ||
+ | |||
+ | |||
+ | ====== Overview over all GPIO signals ====== | ||
+ | |||
+ | Here only some common informations are shown. | ||
+ | The implemented functionality of a single IO depends on the single project. | ||
+ | |||
+ | ^ Netzer Name ^ ID ^ PIC Pin ^ Maximum output current ^ Maximum input voltage ^ Functionality ^ | ||
+ | | SPI_INT | j | RC2 | 25 mA | 5,5 V | Interrupt pin of the SPI slave module, PWM capable | | ||
+ | | SPI_CLK | k | RC3 | 25 mA | 5,5 V | Clock line of the SPI module or I2C module | | ||
+ | | SPI_MI | l | RC4 | 25 mA | 5,5 V | Data input of the SPI module, data line of the I2C module | | ||
+ | | SPI_MO | m | RC5 | 25 mA | 5,5 V | Data output of the SPI module | | ||
+ | | SPI_CS | i | RF7 | 2 mA | 5,5 V | Select input of the SPI slave module | | ||
+ | | RX | h | RC7 | 25 mA | 5,5 V | UART Receive line | | ||
+ | | TX | g | RC6 | 25 mA | 5,5 V | UART Send line | | ||
+ | | IO0 | a | RB0 | 25 mA | 5,5 V | Interrupt capable input | | ||
+ | | IO1 | b | RB1 | 25 mA | 5,5 V | Interrupt capable input | | ||
+ | | IO2 | c | RB2 | 25 mA | 5,5 V | Interrupt capable input | | ||
+ | | IO3 | d | RD1 | 8 mA | 5,5 V | PWM capable | | ||
+ | | IO4 | e | RA2 | 2 mA | 3,3 V | ADC capable | | ||
+ | | IO5 | f | RA3 | 2 mA | 3,3 V | ADC capable | | ||