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en:netzer:s88 [2012/02/06 23:43]
svesch
en:netzer:s88 [2014/02/09 14:32] (current)
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 ====== Accessing S88 feedback bus from Ethernet ====== ====== Accessing S88 feedback bus from Ethernet ======
 +
 +<note important>​For this functionality the **[[io_project|IO project]]** (base or pro) has to be  [[fwupdates|uploaded]] to Netzer.</​note> ​
  
 ===== Preface ===== ===== Preface =====
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 Netzer with installed IO firmware (at least Release *1.5pro*) must be configured via the webinterface:​ Netzer with installed IO firmware (at least Release *1.5pro*) must be configured via the webinterface:​
   - SPI-Master-Mode on the common page (restarting Netzer afterwards is needed)   - SPI-Master-Mode on the common page (restarting Netzer afterwards is needed)
-  - SPI-Master-settings: Frequency on 5 kHz (for long lines also 1.3 kHz may be tried), SPI mode 2 (Idle state of the clock signal is 1, data is stored on falling edge), sampling of the data in the middle of clock cycle (see picture) ​ +  - SPI-Master settings: Frequency on 5 kHz (for long lines also 1.3 kHz may be tried), SPI mode 2 (Idle state of the clock signal is 1, data is stored on falling edge), sampling of the data in the middle of clock cycle (see picture) ​\\ {{s88_spisettings.gif?​nolink&​|SPI Einstellungen}} \\ \\  
- +  - GPIO settings: In this example SPI_INT and SPI_CS are use as digital outputs. Configure them via the GPIO settings dialog! {{s88_gpio.gif?​nolink&​|GPIO settings}}
-{{s88_spisettings.gif?​nolink&​|SPI Einstellungen}}+
  
  
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 | 2 | \J | 0x5C 0x4A | LOAD (at INT-Pin) is set. | | 2 | \J | 0x5C 0x4A | LOAD (at INT-Pin) is set. |
 | 3 | \t | 0x5C 0x74 | Wait minimum 100 µs (silence). | | 3 | \t | 0x5C 0x74 | Wait minimum 100 µs (silence). |
-| 4 | \2 | 0x5C 0x74 | Reset SPI mode to mode 2. CLOCK automatically changes from 0 to 1. At this point the IOs are loaded into the register through the active LOAD signal. |+| 4 | \2 | 0x5C 0x32 | Reset SPI mode to mode 2. CLOCK automatically changes from 0 to 1. At this point the IOs are loaded into the register through the active LOAD signal. |
 | 5 | \I | 0x5C 0x49 | Activating RESET (at CS-Pin) from 0 to 1. Reset the bus devices to well known state. | | 5 | \I | 0x5C 0x49 | Activating RESET (at CS-Pin) from 0 to 1. Reset the bus devices to well known state. |
 | 6 | \i | 0x5C 0x69 | Reset RESET from 1 to 0. | | 6 | \i | 0x5C 0x69 | Reset RESET from 1 to 0. |

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