en:netzer:process

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en:netzer:process [2012/08/17 15:21] – [Register areas (PABs)] Added scratch register. sveschen:netzer:process [2025/06/11 20:42] (current) – external edit 127.0.0.1
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 This PAB is a real SRAM area in the Netzer space.  This PAB is a real SRAM area in the Netzer space. 
-The size is 256 bytes.  +The size is 128 bytes.  
-Therefore 128 integer or 2048 bit variables can be stored. +Therefore 64 integer or 1024 bit variables can be stored. 
 The common PAB is used as scratch area.  The common PAB is used as scratch area. 
 The process has exclusive access, no other Netzer software module can change the common PAB. The process has exclusive access, no other Netzer software module can change the common PAB.
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 For communication between bit and integer areas a copying via the common PAB can be used.  For communication between bit and integer areas a copying via the common PAB can be used. 
  
-== Command interface ==+== Network interface ==
  
-For communication between the command interface and the process a special SRAM area is introduced. There are 8 integers available in each direction (address 0x10-0x17). +For communication between the network and the process a special SRAM area is introduced (network variables). There are 8 integers available in each direction (address 0x10-0x17). 
  
-//Receiving data from command interface// +//Receiving data from network// 
-Each time the command interface writes new data, the corresponding mailbox flag in the bit area is set. The process program can poll for this flag and read the value afterwards. Reading clears the flag automatically.+Each time the network writes new data, the corresponding mailbox flag in the bit area is set. The process program can poll for this flag and read the value afterwards. Reading clears the flag automatically.
  
-//Sending data to command interface// +//Sending data to network// 
-Writing to one of the integers sends data to the command interface. Afterwards the mailbox flag is set automatically. After the command interface has fetched the data, the mailbox flag is cleared. The process should poll mailbox flags to prevent data loss.+Writing to one of the integers sends data to the network. Afterwards the mailbox flag is set automatically. After the network interface has fetched the data, the mailbox flag is cleared. The process should poll mailbox flags to prevent data loss.
  
  
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 | 0x0B | RW | SPI_MI latch pin | | 0x8B | RO | SPI_MI port pin | | 0x0B | RW | SPI_MI latch pin | | 0x8B | RO | SPI_MI port pin |
 | 0x0C | RW | SPI_MO latch pin | | 0x8C | RO | SPI_MO port pin | | 0x0C | RW | SPI_MO latch pin | | 0x8C | RO | SPI_MO port pin |
-|      |    |                  | | 0x8D | RO | Serial TX FiFo ready | +| 0x0D | RW | Serial TX FiFo ready / flush | | 0x8D | RO | RTC time is synchronized | 
-|      |    |                  | | 0x8E | RO | Serial RX FiFo data pending | +| 0x0E | RW | Serial RX FiFo data pending / flush |  |  |  |  | 
-|      |    |                  | | 0x8F | RO | Reserved | +| 0x0F | RW | Netsocket TX FiFo ready / flush | |  |  |  | 
-|      |    |                  | | 0x90-0x97 | RO | Mailbox state for incoming command interface variables | +| 0x10 | RW | Netsocket RX FiFo data pending / flush | |  |  |  | 
-|      |    |                  | | 0x98-0x9F | RO | Mailbox state for outgoing command interface variables |+|      |    |                  | | 0x90-0x97 | RO | Mailbox state for incoming network variables | 
 +|      |    |                  | | 0x98-0x9F | RO | Mailbox state for outgoing network variables | 
 +|      |    |                  | | 0xA0 | RO | Start flag, TRUE for the first process cycle after start. |
  
 == Integer variables == == Integer variables ==
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 | 0x06 | RW | Top of serial FiFo (Reading: RX, Writing: TX) | | 0x06 | RW | Top of serial FiFo (Reading: RX, Writing: TX) |
 | 0x07 | RW | Accessing top of net socket FiFo (Reading: RX, Writing: TX) |  | 0x07 | RW | Accessing top of net socket FiFo (Reading: RX, Writing: TX) | 
-| 0x10-0x17 | RW | Command interface variables |+| 0x08 | RW | Reading delivers the current [[en:netzer:states|state]] of Netzer. Writing can be used for executing commands, i.e. restarting. | 
 +| 0x10-0x17 | RW | Network variables | 
 +| 0x18 | RW | Read access: Delivers net socket state, write access: Executes commands on net socket. |
 | 0x80 | RO | Process scratch register. After a division here the modulo result can be found. | | 0x80 | RO | Process scratch register. After a division here the modulo result can be found. |
 | 0x81 | RO | Ports - All IO port pins in one integer (IO0 is at bit 0 and so on) | | 0x81 | RO | Ports - All IO port pins in one integer (IO0 is at bit 0 and so on) |
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 | 0x89 | RO | RTC Month | | 0x89 | RO | RTC Month |
 | 0x8A | RO | RTC Year | | 0x8A | RO | RTC Year |
 +| 0x8B | RO | Returns a random value. | 
 +| 0x8C | RO | [[io#Edge counter (from version 1.4 pro)|Edge counter]] (measured at IO0) - After reading the counter is cleared. | 
 +| 0x8D | RO | [[io#Edge counter (from version 1.4 pro)|Edge counter]] (measured at IO1) - After reading the counter is cleared. | 
 +| 0x8E | RO | [[io#Edge counter (from version 1.4 pro)|Edge counter]] (measured at IO2) - After reading the counter is cleared. | 
 +| 0x90 | RO | The most significant IP address byte of connected peer. Only valid if net socket state is connected. | 
 +| 0x91 | RO | The second most significant IP address byte of connected peer. Only valid if net socket state is connected. | 
 +| 0x92 | RO | The second least significant IP address byte of connected peer. Only valid if net socket state is connected. | 
 +| 0x93 | RO | The least significant IP address byte of connected peer. Only valid if net socket state is connected. |
 ===== IDE ===== ===== IDE =====
 +
 +The original ldmicro IDE is located [[http://cq.cx/ladder.pl|here]]. MoBaCon has GPL compliant adjusted the IDE for some special Netzer features on base of the official release 2.2. The IDE can directly generate Netzer bytecode which later can be uploaded via the Netzer web interface.
 +Furthermore we have extended the project with a CMake toolchain, where building is also possible for different compilers and IDEs.
 +Also building on Linux is possible now.
 +
 +A patch is posted at the ldmicro forums due the lack of version control - hopefully the patch is integrated in future versions. 
 +In the mean time we have started a ldmicro project at [[http://github.com/mobacon/ldmicro|github]].
 +
 +Executables (run with Windows and Linux Wine) can be downloaded from here:
  
 <WRAP center round download 60%> <WRAP center round download 60%>
  
-[[http://www.cq.cx/dl/ldmicro.exe|Download the IDE]]+{{:bins:ldmicro_rel.zip|LDmicro executable for Windows OS (different languages)}}
  
 </WRAP> </WRAP>
- 
-  
  
 Actually all the features of the IDE which can be compiled into interpretable code can be used.  Actually all the features of the IDE which can be compiled into interpretable code can be used. 
  
-The ADC PWM and UART stuff is not supported by ldmicro for interpreter targets - but that is no problem because the Netzer solves this via its IO register set.  +The ADC, PWM and UART stuff is not supported by ldmicro for interpreter targets - but that is no problem because the Netzer solves this via its IO register set. 
- +
  
 For that reason a simple naming convention must be considered. For that reason a simple naming convention must be considered.
- 
- 
- 
- 
  
 ==== IO PAB Mapping ==== ==== IO PAB Mapping ====